TEXAS INSTRUMENTS INCORPORATEDDownload PDFPatent Trials and Appeals BoardMar 7, 20222021002830 (P.T.A.B. Mar. 7, 2022) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 16/455,583 06/27/2019 Manu A. Prakuzhy TI-76969.1 1016 23494 7590 03/07/2022 TEXAS INSTRUMENTS INCORPORATED P O BOX 655474, MS 3999 DALLAS, TX 75265 EXAMINER SANDVIK, BENJAMIN P ART UNIT PAPER NUMBER 2826 NOTIFICATION DATE DELIVERY MODE 03/07/2022 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): uspto@ti.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte MANU A. PRAKUZHY, SIVA P. GURRUM, DARYL R. HEUSSNER, STEFAN W. WIKTOR, and KEN PHAM Appeal 2021-002830 Application 16/455,583 Technology Center 2800 Before TERRY J. OWENS, JEFFREY T. SMITH, and DONNA M. PRAISS, Administrative Patent Judges. OWENS, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 9-14. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. The Appellant identifies the real party in interest as Texas Instruments Incorporated (Appeal Br. 3). Appeal 2021-002830 Application 16/455,583 2 CLAIMED SUBJECT MATTER The claims are directed to spot-solderable leads for semiconductor device packages. Claim 9, reproduced below, is illustrative of the claimed subject matter: 9. A semiconductor device comprising: at least one semiconductor chip attached to leads of a leadframe, the leads made of sheet metal of full thickness and the leads arrayed into a first subset that alternate with a second subset, the subsets having elongated straight lead portions that are parallel to each other in a planar array; a package of polymeric compound covering the leadframe, the planar array of the straight lead portions of the first and the second subsets are located at a surface of the package, and uncovered surfaces of the leads are coplanar with the surface of the package; and a surface layer having a metallurgical configuration for low surface energy for portions of the uncovered lead surfaces, the low surface energy layer of the leads of the first subset alternate with the low surface energy layer of the leads of the adjacent second subset, the low energy surface layer inhibiting wetting by solder material. REFERENCES The prior art relied upon by the Examiner is: Name Reference Date Greenwood US 6,577,012 B1 June 10, 2003 Liu US 2005/0133896 A1 June 23, 2005 Sun US 2006/0001134 A1 Jan. 5, 2006 You US 2013/0125393 A1 May 23, 2013 REJECTION Claims Rejected 35 U.S.C. § Reference(s)/Basis 9-14 103 Greenwood, Liu, You, Sun Appeal 2021-002830 Application 16/455,583 3 OPINION We need address only claim 9, which is the sole independent claim. That claim requires a semiconductor device comprising leads that 1) are arrayed into adjacent first and second subsets having elongated straight lead portions parallel to each other in a planar array, and 2) have a surface layer with metallurgical configuration for low surface energy for portions of uncovered lead surfaces such that the low surface energy layer of the leads of the first subset alternate with the low surface energy layer of the leads of the adjacent second subset. Greenwood discloses semiconductor device leadframe leads (302) each comprising a wettable region (310) and a non-wettable barrier (106) that defines a wettable pad (108) on the lead (302) (col. 5, ll. 6-9, 13-21; Fig. 5). The non-wettable barrier (106) insures that a solder bump (506) contacts only the wettable pad (108) (col. 7, ll. 28-31; Fig. 5). You discloses a semiconductor device leadframe comprising interleaved thicker lead finger portions (402) with exposed bottom surface connectors to accommodate system printed circuit board (PCB) connections, and thinner lead finger portions (406) formed by a stamping or etching process on a uniform thicker lead frame (¶¶ 31, 33; Figs. 4, 5A, 5B). You discloses that “a top lead frame surface can be optimized for connection via bumps 404 to a monolithic voltage regulator in semiconductor die 408, while a bottom lead frame surface (e.g., by way of thicker lead frame portions 402) can be optimized for a system (e.g., PCB) connection” (¶ 34; Figs. 5A, 5B). The Examiner concludes (Non-final 5-6): Appeal 2021-002830 Application 16/455,583 4 It would have been obvious to one of ordinary skill in the art at the time the invention was made to provide power MOS devices on the leadframe of Greenwood, and to configure the leads as first and second subsets of input/ground and switch line connections as elongated straight lead portions that are parallel to each other, as taught by You in order to implement a voltage regulator and packaging that is optimized for the device (Paragraph 3, 4 and 8). NOTE: in this configuration the low surface energy layer of the leads as taught by Greenwood would be applied to the first and second subsets of You such that the low surface energy layer of the first subset would alternate with the low surface energy layer of the leads of the adjacent second subset (see Fig. 4 of You, the dashed circles correspond to the positions of solder connections that would be applied with the low surface energy layers of Greenwood). Setting forth a prima facie case of obviousness requires establishing that the applied prior art would have provided one of ordinary skill in the art with an apparent reason to modify the prior art to arrive at the claimed invention. See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). The Examiner does not establish that the applied references would have provided one of ordinary skill in the art with an apparent reason “to provide power MOS devices on the leadframe of Greenwood, and to configure the leads as first and second subsets of input/ground and switch line connections as elongated straight lead portions that are parallel to each other, as taught by You in order to implement a voltage regulator and packaging that is optimized for the device” (Non-final 5-6), or to apply Greenwood’s non-wettable barrier (106) to You’s thicker (402) and thinner (406) lead finger portions such that the non-wettable barriers (106) of the thicker portions (402) alternate with the non-wettable barriers (106) of the thinner portions (406) and the positions of solder connections with non- Appeal 2021-002830 Application 16/455,583 5 wettable barriers (106) are indicated by dashed circles in You’s Figure 4 (Non-final 6). Thus, the record indicates that the Examiner’s rejection is based upon impermissible hindsight in view of the Appellant’s disclosure. See In re Warner, 379 F.2d 1011, 1017 (CCPA 1967) (“A rejection based on section 103 clearly must rest on a factual basis, and these facts must be interpreted without hindsight reconstruction of the invention from the prior art”). Accordingly, we reverse the rejection. CONCLUSION The Examiner’s rejection is reversed. DECISION SUMMARY In summary: Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 9-14 103 Greenwood, Liu, You, Sun 9-14 REVERSED Copy with citationCopy as parenthetical citation