QUALCOMM Incorporated

Patent Trials and Appeals Board

May 4, 2021

2020000976 (P.T.A.B. May. 4, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/850,104 09/10/2015 Richard Dominic Wietfeldt 152575/1173-287 4111
115309 7590 05/04/2021
W&T/Qualcomm
106 Pinedale Springs Way
Cary, NC 27511
EXAMINER
SUN, SCOTT C
ART UNIT PAPER NUMBER
2181
NOTIFICATION DATE DELIVERY MODE
05/04/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
ocpat_uspto@qualcomm.com
patents@wt-ip.com
us-docketing@qualcomm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte RICHARD DOMINIC WIETFELDT, MAXIME LECLERCQ, and
GEORGE ALAN WILEY
Appeal 2020-000976
Application 14/850,104
Technology Center 2100
Before ELENI MANTIS MERCADER, LARRY J. HUME, and
SCOTT E. BAIN, Administrative Patent Judges.
MANTIS MERCADER, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 17–28. See Final Act. 1. We have
jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.

1 We use the term “Appellant” to refer to “applicant” as defined in 37 C.F.R.
§ 1.42. Appellant identifies the real party in interest as QUALCOMM
Incorporated. Appeal Br. 2.
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Application 14/850,104

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CLAIMED SUBJECT MATTER
The claims are directed to a unified systems and methods for interchip
and intrachip node communication. Claim 17, reproduced below, is
illustrative of the claimed subject matter:
17. An integrated circuit (IC), comprising:
a node comprising a transmitter and a receiver; and
a gateway comprising:
an external interface configured to be coupled to a bus
external to the IC and communicate thereover through a first
protocol; and
an internal interface communicatively coupled to the node
and configured to communicate therebetween through the first
protocol.
REFERENCES
The prior art relied upon by the Examiner as evidence is:
Name Reference Date
Hanes US 2007/0109015 A1 May 17, 2007
Poulsen US 2013/0322462 A1 Dec. 5, 2013
REJECTION
Claims 17–28 are rejected under 35 U.S.C. § 103 as being obvious
over Hanes in view of Poulsen. Final Act. 3.
OPINION
Except where indicated, we adopt the Examiner’s findings in the
Answer and Final Office Action and we add the following primarily for
emphasis. We note that if Appellant failed to present arguments on a
particular rejection, we decline to review unilaterally those uncontested
aspects of the rejection. See Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI
2010) (precedential); Hyatt v. Dudas, 551 F.3d 1307, 1313–14 (Fed.
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Cir. 2008) (the Board may treat arguments Appellant failed to make for a
given ground of rejection as waived).
(1) Does Hanes disclose a gateway comprising an external interface
and an internal interface?
Appellant argues that Hanes does not teach an “external interface”
within “switching element 20” or equivalent “switching elements 72, 74,
76.” See Appeal Br. 6.
We disagree with Appellant’s argument. The claim language does not
require that the external interface be within the gateway but rather that the
gateway comprises an external interface and an internal interface. See
claim 17. We give claims their broadest reasonable interpretation consistent
with the specification. In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359,
1369 (Fed. Cir. 2004). Appellant’s Specification states that “[t]he gateway
46 includes an internal interface that is coupled to the nodes 34(1)-34(N) and
an external interface that is coupled to the external bus 38.” Spec. para. 39.
The Examiner, consistent with Appellant’s Specification finds, and we
agree, that in the absence of any other structural or functional limitations to
the term “gateway” as claimed is met by the external interface labeled 91 in
Figure 2 and the internal interface of switching element labeled 72 in Figure
2.2 See Ans. 3.
Appellant in its Reply Brief further explains that element 60, which is
the external interface, and element 64 that is the internal interface, are within
gateway 46. See Reply Br. 3–4. Appellant seems to argue that elements 60
and 64 are within the gateway 46 but there is no equivalent box labeled as

2 The Examiner refers to element 90 but we treat this as harmless error as the
external interface is element 91 in Figure 2.
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“gateway” encircling the external interface labeled 91 and the internal
interface, switching element labeled 72, in Hanes’ Figure 2. We note that
the claim is silent about the internal and external interface being within the
gateway or being part of a single structure. Instead the claim requires that
the gateway comprises an external and an internal interface and thus, the
external interface 91 and the internal interface 72 of Hanes constitute a
gateway.
Furthermore, to the extent that Appellant makes a distinction with
respect to the Specification Figure 3, we do not read limitations from the
Specification into the claim. Although claims are interpreted in light of the
specification, limitations from the specification are not read into the claims.
In re Van Geuns, 988 F.2d 1181, 1184 (Fed. Cir. 1993).
Thus, we understand the external and internal interfaces to be
“within” the gateway to be unclaimed features. See Broadcom Corp. v.
Qualcomm Inc., 543 F.3d 683, 689 (Fed. Cir. 2008) (noting that “‘each
claim does not necessarily cover every feature disclosed in the specification.
When the claim addresses only some of the features disclosed in the
specification, it is improper to limit the claim to other, unclaimed features’”
(citation omitted)). Moreover, there is no ipsissimis verbis test for
determining whether a reference discloses a claim element, i.e., identity of
terminology is not required. In re Bond, 910 F.2d 831, 832 (Fed. Cir. 1990).
Thus, the gateway being defined as an internal and external interface
(see Spec. para. 39) is met by Hanes’ external interface 91 and internal
interface 72, and there is no requirement that the prior art identifies them as
a gateway because identity of terminology is not required.
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(2) Does Hanes teach away from moving the external interface into
the switching element?
Appellant argues that Hanes teaches away from modifying Hanes to
move the “external interface 91, 93, or 95” into the “switching elements 72,
74, or 76.” See Appeal Br. 7. Appellant first cites to Hanes at paragraph 70
“[e]xternal devices may communicate over longer distances at high rates by
using serialized clock recovery links, for example, to aid in moving data
across boards or equipment backplanes . . . As noted above, internal
switching elements allow different connection segment sizes and/or speeds
to be used in the same integrated circuit.” Id. Appellant further cites to
Hanes at paragraph 72 “external and internal connections may both use
packet formats, but the internal connections may handle multiword parallel
packets instead of serial packets supported on the external bus, for example.”
Id. Appellant argues that changing the external interface to be inside the
switching elements would vitiate this ability and render Hanes unsuitable for
its purpose. Id.
We do not agree with Appellant’s argument. As discussed above, we
agree with Examiner’s finding that the subject matter of claim 17 only
requires that the gateway comprises at least two structures which are the
external interface and internal interface. See Ans. 3 and see also claim 17.
The Examiner has not proposed changing the external interface to be inside
the switching elements, but rather recognizes that Hanes’ external interface
91 and internal interface 72, both together without any further modification,
constitute a gateway. See Ans. 3 and Hanes Figure 2.
Furthermore, the Examiner finds that Hanes expressly teaches the
external and internal integrated circuits using the same protocol. See Ans. 4
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(citing para. 14). Thus, both the external and internal interface of Hanes use
the same protocol.
(3) Does Hanes teach a first protocol used by the internal and
external interface or whether Hanes in view of Poulsen makes obvious the
use of a first protocol by the internal and external interface?
Appellant argues, even if it is proper to label the collection of the
switching element and the external interface as a gateway, this amalgamated
gateway still does not use a first protocol for both the internal interface and
the external interface. See Appeal Br. 8.
Examiner finds, and we agree, Hanes teaches the external and
interface bus use the same protocol. See Ans. 4 (citing Hanes para. 14
“Some embodiments of the invention relate to a physical switched bus
architecture in which an external bus and an internal integrated circuit bus
use the same protocol. Extending the range of a protocol in this manner can
greatly improve the access to and performance of components connected to
the bus”). Examiner further finds, and we agree with, that Poulsen teaches
“a unified interface for devices that generate numeric data in different
formats but can be coupled to the same bus.” Id. (citing Poulsen para. 147).
Accordingly, we affirm the Examiner’s rejection of claim 17 and, for
the same reasons, the rejections of claims 18–28 not argued separately.
CONCLUSION
We AFFIRM the Examiner’s decision to reject claims 17–28.
DECISION SUMMARY
Claim(s)
Rejected
35 U.S.C. § Reference(s)/Basis Affirmed Reversed
17–28 103 Hanes, Poulsen 17–28
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RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). See 37
C.F.R. § 41.50(f).
AFFIRMED